IMDS DQR Code 187

Issue: Application code 59 is no longer valid

Application code 59 referred to ELV Annex II exemption 8(g) which read Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit flip chip packages.  In December, 2019 Annex II was amended and 8(g) was replaced by the following exemptions for Pb in some electronic components.  The new text of Annex II is as follows:

  • 8(g)(i) – Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit flip chip packages
  • 8(g)(ii-i) – Lead in solders to complete a viable electrical connection between the semiconductor die and the carrier within integrated circuit flip chip packages where that electrical connection consists of a semiconductor technology node of 90 nm or larger
  • 8(g)(ii-ii) – Lead in solders to complete a viable electrical connection between the semiconductor die and the carrier within integrated circuit flip chip packages where that electrical connection consists of a single die of 300 mm² or larger in any semiconductor technology node
  • 8(g)(ii-iii) – Lead in solders to complete a viable electrical connection between the semiconductor die and the carrier within integrated circuit flip chip packages where that electrical connection consists of stacked die packages with dies of 300 mm² or larger, or silicon interposers of 300 mm² or larger.

All these exemptions are only valid for vehicles type-approved from 1 October 2022 and spare parts for these vehicles.

Action Required:

Update your application code with one of the following:

Code 75 for 8(g)(i) – Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit flip chip packages

Code 76 for 8(g)(ii-i) – Lead in solders to complete a viable electrical connection between the semiconductor die and the carrier within integrated circuit flip chip packages where that electrical connection consists of a semiconductor technology node of 90 nm or larger

Code 77 for 8(g)(ii-ii) – Lead in solders to complete a viable electrical connection between the semiconductor die and the carrier within integrated circuit flip chip packages where that electrical connection consists of a single die of 300 mm² or larger in any semiconductor technology node

Code 78 for 8(g)(ii-iii) – Lead in solders to complete a viable electrical connection between the semiconductor die and the carrier within integrated circuit flip chip packages where that electrical connection consists of stacked die packages with dies of 300 mm² or larger, or silicon interposers of 300 mm² or larger

If none of the new application codes apply and you do not find another appropriate application code, you may have a non-compliant part.  Contact your customer to discuss the issue and determining the appropriate action regarding the part.